EDN

ASIC Implementation in Programmable Logic

The re-targeting of an application specific integrated circuit (ASIC) design in a field programmable gate array (FPGA) demonstrates the viability of using programmable logic in high-performance signal ...
CoinTelegraph

Majority of Voters Support ASIC-Resistant ETH Algorithm Implementation, Online Vote Shows

Voters in favor of the ProgPoW implementation currently hold over three times more Ethereum than those who voted against it. ProgPoW is an application-specific integrated circuit (ASIC)-resistant PoW ...
Design-Reuse

What platform ASICs are and when to use them

Although system designers in need of custom logic solutions are increasingly faced with new technical challenges, they are armed with new advancements and choices in custom silicon offerings. One of ...
EDN

FPGAs for prototyping – ASICs for production

FPGAs are a valuable technology for designing and prototyping digital logic into medium-volume, medium-density applications. Their high unit cost, however, makes an FPGA cost-prohibitive to move into ...
Design-Reuse

DSP/ASIC approach offers processing benefits for 802.11b implementation

With the advent of new high-bandwidth wireless data technologies such as 802.11b (Wi-Fi, WLAN), design efforts based on legacy chipset architectures have become a formidable problem. Providing the ...
Business Wire

Faraday Unveils Design Implementation Services for FinFET Technology Targeting All Foundries

HSINCHU, Taiwan--(BUSINESS WIRE)--Faraday Technology Corporation (TWSE: 3035), a leading ASIC design service and IP provider, announced its debut of its design implementation services for FinFET ...
CoinTelegraph

Ethereum Devs Delay ASIC-Resistant PoW Algorithm Decision Until Third-Party Audit

Ethereum (ETH) core developers have delayed the decision to implement Application-Specific Integrated Circuit (ASIC)-resistant proof-of-work (PoW) algorithm ProgPoW. According to an Ethereum core ...
Semiconductor Engineering

The New ASIC

For years, large ASICs like the ones used in network processing, supercomputing and high-end personal computing have had very interesting similarities. The figure below is a fairly typical floorplan ...
Electronic Design

The ASIC Vendor's View Of RTL Rule Checking

Frequently, the customer netlists sent to ASIC vendors' design center engineers for physical implementation are riddled with problems. "If you have timing or congestion problems in implementations, it ...
Electronic Design

RF CMOS ASIC Platforms Simplify Implementation Of Advanced RF SoCs

Toshiba Electronics Europe’s ASIC Foundry Business Unit has announced a new generation of technologies and services for speeding the development and reducing the cost of system-on-a-chip (SoC) RF ICs ...